PURPOSE: To attain an inexpensive circuit by providing a line termination circuit having a reception circuit, a transmission circuit and a function for frame assembling and an interface circuit with a host layer LSI such as a controller and a CODEC.

CONSTITUTION: In the busy state, a line terminating circuit separates channels B1, B2, d and maintenance bits from a received signal string and stores them in a buffer memory 14. An interface circuit 15 reads data stored in the memory 14 and sends the data to a host layer. Furthermore, the circuit 15 stores the data from the host layer to the network terminating circuit 13 to the memory 14. The circuit 13 multiplexes the channels B1, B2, d and maintenance bits and state control information or the like, they are processed into frames and sent to a subscriber line via the transmission circuit 12. According to the line termination circuit as above, the interface between the network and the DSU is in compliance with the ITU-T recommendations G961 and a reference point T is completely degenerated.