PURPOSE: To obtain a noise preventing circuit for removing high frequency noise from a signal line by connecting the output sides of the 1st and 2nd NAND gates to the input side of an RS flip flop (FF) and connecting the output side of the RS FF to a data signal output terminal.

CONSTITUTION: Since respective signals A to C are successively delayed in each clock period, the rectangular waveform of a noise part when the noise period is less than three clock periods does not appear on the output of a NAND gate G1. On the other hand, a data signal having the same level more than three clock periods is outputted from the NAND gate G1 as it is. Thus, the data signal including noise is inputted to this circuit, and when the noise period is less than three clock periods (the number of D flip flops), the data signal from which the noise removed is outputted. Thus, the circuit for removing noise included in the data signal can simply be constituted and cost reduction and IC formation can easily be obtained.