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Title:
NOISE REDUCING CIRCUIT AND SEMICONDUCTOR DEVICE EQUIPPED WITH THE SAME
Document Type and Number:
Japanese Patent JP2001339288
Kind Code:
A
Abstract:

To provide a noise reducing circuit which can reduce unnecessary radiation noise generated by a semiconductor device and a semiconductor device equipped with it as to a noise reducing circuit which is suitably used for on board electric accessory equipment requiring EMI countermeasures and a semiconductor device equipped with it.

An LSI chip 1 has a power terminal 4 for supplying an external source voltage to an internal circuit 2 having a circuit operating in synchronism with a clock and a ground terminal 6 applying a ground potential. Further, the LSI chip 1 is equipped with plural low-pass filters LPF which are inserted between the power terminal 4 and internal circuit 2, and the ground terminal 6 and internal circuit 2 and composed of resistance elements RS1 to RSn and RG1 to RGn and MOS capacitors CS1 to CSn and CG1 to CGn, and has a noise reducing circuit which reduces radiation noise conducted from the internal circuit 2.


Inventors:
SUZUKI YOSHINORI
NUNOKAWA HIDEO
Application Number:
JP2000158654A
Publication Date:
December 07, 2001
Filing Date:
May 29, 2000
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L27/04; H03H1/02; H03H7/06; H03K19/003; H01L21/822; (IPC1-7): H03K19/003; H01L27/04; H01L21/822; H03H7/06
Attorney, Agent or Firm:
Masaki Morioka