Title:
NOISE REDUCTION CIRCUIT
Document Type and Number:
Japanese Patent JPS6416078
Kind Code:
A
Abstract:
PURPOSE:To obtain a desired S/N at all times and to suppress after image efficiently by detecting a noise level during the vertical blanking period of a video signal and setting the coefficient of the block characteristic of the frequency characteristic depending on the detection level. CONSTITUTION:A coefficient setting circuit 12 sends a signal revising a coefficient K of a coefficient circuit 7 in response to an output signal of a noise level detection circuit 11. The coefficient setting circuit 12 gives a signal to increase the coefficient K of the circuit 7 when the noise level detection circuit 11 discriminates it that the noise level mixed in the video signal is large and the circuit 12 gives a signal to reduce the coefficient K of the circuit 7 when the circuit 11 discriminates it that the noise level mixed in the video signal is small. Thus, even if various video signals having different S/N fed to the input terminal 1, the noise signal is always suppressed with high performance and the after image is also suppressed effectively.
Inventors:
ITOGA MASAMI
MIZUTANI YOSHIKI
YAMASHITA KOICHI
MIZUTANI YOSHIKI
YAMASHITA KOICHI
Application Number:
JP17148087A
Publication Date:
January 19, 1989
Filing Date:
July 09, 1987
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H04N5/21; (IPC1-7): H04N5/21
Attorney, Agent or Firm:
Masuo Oiwa