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Title:
NON-INTEGRAL ORDER DYNAMIC SYSTEM
Document Type and Number:
Japanese Patent JP2002258903
Kind Code:
A
Abstract:

To provide a circuit adapted for realizing a non-integral order dynamic system.

In this circuit for realizing a non-integral order dynamic system including a neural network(1-5) adapted for generating at least one output signal(OS) by receiving at least one input signal(IS), the input signal and output signal are related with each other in a non-integral order differential/integral relation based on the coefficients of the neutral network (1-5). A plurality of circuits (I, II) for realizing a non-integral order (PIλDμ) controller are connected to each other, and a signal is generated by either an integrating block (200) or a differentiating block (202) included in those circuits, and the signal is supplied to the integrating block (200) or the differentiating block (202) of the other circuit in this system.


Inventors:
ABBISSO SALVATORE
CAPONETTO RICCARDO
DIAMANTE OLGA
PORTO DOMENICO
DI COLA EUSEBIO
FORTUNA LUIGI
Application Number:
JP2001396005A
Publication Date:
September 13, 2002
Filing Date:
December 27, 2001
Export Citation:
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Assignee:
ST MICROELECTRONICS SRL
International Classes:
G06N3/00; G05B11/42; G05B13/02; (IPC1-7): G05B13/02; G06N3/00
Attorney, Agent or Firm:
Sugimura Kosaku (1 person outside)