PURPOSE: To operate a non-volatile memory device by a low voltage without fail and to enlarge a margin to an endurance characteristic by connecting a transistor for byte separation to the source electrode of a memory transistor and impressing a prescribed voltage to a control gate.

CONSTITUTION: A transistor Tr3 for byte separation is provided. For the transistor Tr3, a source is connected to the source of a memory transistor Tr4 and a gate is connected to a row word line 12. A control gate line 13 is provided to be connected to the gate of the memory transistor Tr4 and to apply any one of a first power source voltage, a second power source voltage and another reference potential to the gate of the memory transistor Tr4. Accordingly, byte separation is not executed by the control gate but executed by the GND supply of a memory cell. Then, the voltage to be impressed to the control gate can be prevented from being lowered only by the threshold voltage of the transistor Tr3 for byte separation. Thus, the non-volatile memory device can be operated even by the low voltage and the margin to the endurance characteristic can be enlarged.