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Patent Searching and Data


Title:
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JPS62165370
Kind Code:
A
Abstract:

PURPOSE: To realize uniform writing characteristics and erasing characteristics by a method wherein an erasing electrode is formed to have a trapezoid cross section and its end surfaces are tapered and end surfaces of floating gate electrodes are formed to have reverse tapers which are complementary to the end surfaces of the erasing electrode and those electrodes are made to overlap each other along the tapered end surfaces with thin insulating films between.

CONSTITUTION: An erasing electrode 5 is formed to have a trapezoid cross section and its end surfaces are tapered. On the other hand, end surfaces of floating gate electrodes 41 and 42 are formed to have reverse tapers which are complementary to the end surfaces of the erasing electrode 5. The erasing electrode 5 and the floating gate electrodes 41 and 42 are made to overlap each other along their tapered end surfaces with this oxide films 6 between. Moreover, as the thickness of the erasing electrode 5 and the thicknesses of the floating gate electrodes 41 and 42 are approximately equal, almost no difference in levels exists between those electrodes so that a continuous flat surface can be formed. As a result, a control gate electrode 8 which is laminated on the electrodes 5, 41 and 42 with a thin oxide film 7 between also has very little difference in level and provides excellent flatness.


Inventors:
TSUSHIMA TOSHIKI
Application Number:
JP1986000006913
Publication Date:
July 21, 1987
Filing Date:
January 16, 1986
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H01L21/8247; H01L29/78; H01L29/788; H01L29/792; (IPC1-7): H01L29/78