Title:
不揮発性半導体記憶装置及びその制御方法
Document Type and Number:
Japanese Patent JP4653833
Kind Code:
B2
Abstract:
Provided is a nonvolatile semiconductor memory device capable of performing a writing action for a memory cell at high speed. The device includes a memory cell array having a first sub-bank and a second sub-bank each having a plurality of nonvolatile memory cells arranged in a form of a matrix; a row decoder shared by the first sub-bank and the second sub-bank; a first column decoder and a second column decoder provided in the first sub-bank and the second sub-bank, respectively; and a control circuit arranged to execute alternately a first action cycle to perform a programming action in the first sub-bank and a reading action for a programming verifying action in the second sub-bank and a second action cycle to perform the reading action for the programming verifying action in the first sub-bank and the programming action in the second sub-bank.
Inventors:
Kazuya Ishihara
Hiroshi Ishikawa
Yoshi Ota
Hiroshi Ishikawa
Yoshi Ota
Application Number:
JP2008283009A
Publication Date:
March 16, 2011
Filing Date:
November 04, 2008
Export Citation:
Assignee:
Sharp Corporation
International Classes:
G11C16/02; G11C13/00
Domestic Patent References:
| JP8018018A | ||||
| JP2002279789A | ||||
| JP2002133899A | ||||
| JP4276393A | ||||
| JP2006107691A | ||||
| JP2007536680A |
Attorney, Agent or Firm:
Yoshifumi Masaki