Title:
不揮発性半導体記憶装置、及びその製造方法
Document Type and Number:
Japanese Patent JP5322533
Kind Code:
B2
Abstract:
A cell array includes a memory cell region in which memory cells are formed and a peripheral region that is provided around the memory cell region. In the memory cell region, first lines are extended in parallel with a first direction, and the first lines are repeatedly formed at first intervals in a second direction orthogonal to the first direction. In the peripheral region, each of the first lines located at (4n−3)-th (n is a positive integer) and (4n−2)-th positions in the second direction from a predetermined position has a contact connecting portion on one end side in the first direction of the first line. In the peripheral region, each of the first lines located at (4n−1)-th and 4n-th positions in the second direction from the predetermined position has the contact connecting portion on the other end side in the first direction of the first line. The contact connecting portion is formed so as to contact a contact plug extended in a laminating direction.
Inventors:
Hiroyuki Nagashima
Hirofumi Inoue
Masanori Komura
Hideyuki Tabata
Eiji Ito
Hirofumi Inoue
Masanori Komura
Hideyuki Tabata
Eiji Ito
Application Number:
JP2008208421A
Publication Date:
October 23, 2013
Filing Date:
August 13, 2008
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L27/10; H01L45/00; H01L49/00
Domestic Patent References:
| JP9036229A | ||||
| JP2007536680A | ||||
| JP2004006579A | ||||
| JP2006512776A | ||||
| JP11251430A | ||||
| JP2007335763A |
Foreign References:
| WO2008016932A1 | ||||
| WO2006105453A1 |
Attorney, Agent or Firm:
Kisaragi International Patent Business Corporation