Title:
NON-VOLATILE SEMICONDUCTOR STORAGE AND ITS MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP3459062
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To securely improve the injection efficiency of an electron in a non- volatile semiconductor storage having a step section for achieving high-speed writing at a low voltage.
SOLUTION: On a first surface region 13 that is the upper stage of the step section, a control gate electrode 21 is formed via a fist insulating film 22. Near a step section 16 inside a semiconductor substrate 11, a depletion control layer 33 is provided. The depletion control layer 33 is extended to a corner at the lower side of the step section 16 from a position having an interval to the corner at the upper side of the step section 16 in the lower section of a floating gate electrode 23, and at the same time is composed by a p-type high- concentration impurity region that is formed adjacently to the end section of a drain region 32 without reaching a step-side region 15.
Inventors:
Hiromasa Fujimoto
Ogura Sanity
Shinji Odanaka
Cedar Nobuyo Yama
Ogura Sanity
Shinji Odanaka
Cedar Nobuyo Yama
Application Number:
JP2001151928A
Publication Date:
October 20, 2003
Filing Date:
May 22, 2001
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
Halo LSI Design and Device Technology, Inc.
Halo LSI Design and Device Technology, Inc.
International Classes:
H01L21/8247; H01L27/115; H01L29/788; H01L29/792; (IPC1-7): H01L21/8247; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP11260944A | ||||
| JP9321155A | ||||
| JP11260942A | ||||
| JP878541A | ||||
| JP922598A | ||||
| JP7115142A |
Attorney, Agent or Firm:
Hiroshi Maeda (7 outside)