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Title:
非整数周波数分割装置
Document Type and Number:
Japanese Patent JP4357692
Kind Code:
B2
Abstract:
A non-integer frequency divider that is capable of dividing an original clock frequency by a non-integer number into a desired target clock frequency. By this non-integer frequency divider, a phase-shifting circuit is first used to convert the original clock frequency into a predetermined number of phase-shifted versions of the original clock frequency with a predetermined phase difference. Then, a plurality of edge-triggered clock signal generators are used to generate a plurality of edge-triggered signals whose rising and falling edges are synchronized with the original clock frequency and its phase-shifted versions. Finally, a synthesis circuit is used to synthesize the edge-triggered signals into an output signal serving as the intended target clock frequency.

Inventors:
Lee Coral
Hayashi Shiho
Application Number:
JP2000102304A
Publication Date:
November 04, 2009
Filing Date:
April 04, 2000
Export Citation:
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Assignee:
VIA Technologies,Inc
International Classes:
G06F1/08; H03K23/42; G06F1/04; H03K5/00; H03K5/13; H03K5/26; H03K23/54; H03K23/68
Domestic Patent References:
JP6338123B2
JP5169347A
JP4104614A
JP1120910A
JP1032486A
Attorney, Agent or Firm:
Masatake Shiga
Takashi Watanabe
Yasuhiko Murayama
Shinya Mitsuhiro



 
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