NONVOLATILE MEMORY STRUCTURE

Japanese Patent JP2014239205

A

PROBLEM TO BE SOLVED: To disclose a nonvolatile memory structure which improves a data holding property.SOLUTION: The nonvolatile memory structure comprises a substrate including first, second and third OD regions disposed in a row direction. The first, second and third OD regions are separated from each other by separation regions. The separation regions include a first interposing separation region between the first OD region and the second OD region and a second interposing separation region between the second OD region and the third OD region. A first selection transistor is formed on the first OD region. A floating gate transistor is formed on the second OD region. The floating gate transistor is coupled in series to the first selection transistor. The floating gate transistor includes a floating gate which is completely overlapped with the second OD region and partially overlapped with the first and second interposing separation regions. A second selection transistor is formed on the third OD region and coupled in series to the floating gate transistor.

CHEN CHIH-HSIN
CHEN WEI JIN
LAI TSUNG-MU

JP2014019119A

December 18, 2014

February 04, 2014

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EMEMORY TECHNOLOGY INC

H01L21/336; H01L21/8247; H01L27/115; H01L29/788; H01L29/792

JP2010283110A	2010-12-16
JP2009081181A	2009-04-16
JP2013102119A	2013-05-23
JPH0237778A	1990-02-07
JP2006344735A	2006-12-21

Tadashige Ito
Tadahiko Ito
Shinsuke Onuki

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