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Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPH09307008
Kind Code:
A
Abstract:

To reduce the size of a memory cell, without restriction by punch- through of a thin film transistor, etc., by forming element isolating insulation films between parallel diffused layers wirings on a semiconductor substrate and laminating the thin film transistors on the diffused layer wirings.

The nonvolatile semiconductor memory device 1 comprises parallel diffused layer wirings 13 with an element isolating insulation film 12 between on a semiconductor substrate 11 and thin film transistors 2 laminated on these wirings 13. With the reduction of the cell area of the thin film transistor 2, it is never restricted by the region of each wiring 13 to form bit lines and source lines, punch-through between the wirings 13, short channel effect of the transistor 2, etc. A first insulation film 14 is formed on one of the wirings 13 so as to be continuous to the insulation film 12 and channel regions 18 of the transistors 2 extend thereon to increase the channel length.


Inventors:
NISHIHARA TOSHIYUKI
Application Number:
JP12430096A
Publication Date:
November 28, 1997
Filing Date:
May 20, 1996
Export Citation:
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Assignee:
SONY CORP
International Classes:
H01L21/8247; H01L27/115; H01L29/786; H01L29/788; H01L29/792; (IPC1-7): H01L21/8247; H01L29/788; H01L29/792; H01L27/115; H01L29/786
Attorney, Agent or Firm:
船橋 國則