Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JP2014179153
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device that controls the threshold distribution of write data.SOLUTION: A nonvolatile semiconductor memory device comprises: a memory cell array (2) including a plurality of memory cells; and a sense amplifier (4) that writes data to the memory cells. The sense amplifier (4) includes: a first sense unit (SAUm) that includes a first sub-amplifier group (EX:SSA6, 7, and 8) and a first arithmetic circuit; and a second sense unit (SAUm+1) that is adjacent to the first sense unit and includes a second sub-amplifier group (EX:SSA6, 7, and 8) which is different from the first sub-amplifier group, and a second arithmetic circuit. Each of the first and second sub-amplifier groups (SSA) are connected in common by a first wiring and second wiring (DBUS) via a corresponding first switch group (Tr, SW; to which a signal STL is supplied). The first arithmetic circuit (NDL circuit m) is connected to the second wiring via a second switch (SW_NDL) and connected to the first wiring (DBUS) via a third switch (NDSW).
Inventors:
KAGA HIROYUKI
YOSHIHARA MASAHIRO
ABIKO TAKAFUMI
HARADA YOSHIKAZU
YOSHIHARA MASAHIRO
ABIKO TAKAFUMI
HARADA YOSHIKAZU
Application Number:
JP2013054237A
Publication Date:
September 25, 2014
Filing Date:
March 15, 2013
Export Citation:
Assignee:
TOSHIBA CORP
International Classes:
G11C16/06; G11C16/02; G11C16/04
Attorney, Agent or Firm:
Masatoshi Kurata
Toshihiro Fukuhara
Makoto Nakamura
Nobuhisa Nogawa
Peak Takashi
Naoki Kono
Sunagawa 克
Iseki Mamoru 3
Takao Akaho
Tadashi Inoue
Tatsushi Sato
Okada Kishi
Mihoko Horiuchi
Toshihiro Fukuhara
Makoto Nakamura
Nobuhisa Nogawa
Peak Takashi
Naoki Kono
Sunagawa 克
Iseki Mamoru 3
Takao Akaho
Tadashi Inoue
Tatsushi Sato
Okada Kishi
Mihoko Horiuchi