PURPOSE: To obtain the memory storage, the degree of integration thereof is easily improved by a simple structure, by arranging nonvolatile semiconductor memories with floating gates and control gates in a matrix shape and constituting the memories in a form of one element/cell.

CONSTITUTION: n+ Type source region 22 and drain region 23 are diffused and formed to a p type Si substrate 21, and the first and second control gates 25, 26 consisting of mutually separate polycrystalline Si through a gate insulating film 24 are horizontally formed oppositely onto a channel region between these regions. The floating gate 28 consisting of polycrystalline Si similarly is formed onto these control gates through a gate insulating film 27, but both ends of the gate 28 are each positioned onto the gates 25 and 26 so that capacitive coupling among the gate 28 and both the gates 25 and 26 reaches proper magnitude. An n+ type region 29 continuing to the region 22 is fast stuck to the channel region and formed as an information rewriting region, and the gate 28 is extended onto the region 29 through an insulating film 30. The elements are arranged in a matrix shape, and used as a bit selective array.