To make it possible to read the data of a memory cell corresponding to the address except data writing by separating a control circuit into a write only write control circuit and a read only read control circuit, and adding a write address control circuit.

A write address control circuit 13 stores all the addresses loaded with write data, and judges whether the address during writing at present stored in a write address control circuit 13 coincides with the address required for reading or not when external read request occurs from the exterior during writing in the memory cell after the initial write data is loaded in an EEPROM. Even if a write control circuit 11 and read control circuit 12 are separated after the initial write data loaded in the EEPROM, the data can be read between one certain write data loading and next data loading.