PURPOSE: To decrease greatly the data writing time to a large capacity ROM containing many memory addresses by providing a latch circuit within the ROM to hold temporarily the write data.
CONSTITUTION: An EEP-ROM contains a storage mat MX, a Y decoder 1, an X decoder 2, power-down/program logic part 3, an output buffer part 4, a Y gate circuit 5, etc. The lower five bits A0WA4 of the address data are advanced every bit, and the write data D0 is replaced. Then latch circuits F1WFm set on Y selection rows Y1WYm latch the write data equal to a line respectively. A program terminal PGM is set at L and the data equal to a row and held by those latch circuits are written simultaneously to memory cells M11WM1m set on the corresponding column. The latch time of the latch circuit can be extremely decreased compared with the necessary writing time. Thus it is possible complete the writing of data equal to a row just in a single time of writing.
HAYASAKA SATORU
YAMADA KOICHI
HITACHI TOBU SEMICONDUCTOR LTD
HITACHI LTD