Title:
NOTCHED WAFER POSITION DETECTOR DEVICE
Document Type and Number:
Japanese Patent JP2760918
Kind Code:
B2
Abstract:
PURPOSE: To rapidly and accurately detect a V-shaped notch formed in a semiconductor wafer.
CONSTITUTION: A semiconductor wafer held on a table is roughly fed in steps using a stepping motor At this time, an output signal from a CCD line sensor 3 is provided to comparators 91-95. A CPU 10 monitors changes in output signals from the comparators 91-95 and hereby detects a notch formed in the wafer. After the detection of the notch, the wafer is finely fed in steps to sample peripheral position data of a notch region (output from an A/D converter 8) for storage of the same in a RAM 11. The CPU 10 estimates a notch position based upon the peripheral position data stored in the RAM 11.
Inventors:
YAMAMOTO SATOSHI
KAMEI KENJI
KAMEI KENJI
Application Number:
JP4809092A
Publication Date:
June 04, 1998
Filing Date:
February 03, 1992
Export Citation:
Assignee:
DAINIPPON SUKURIIN SEIZO KK
International Classes:
G01D5/34; H01L21/68; (IPC1-7): H01L21/68
Domestic Patent References:
| JP1303737A | ||||
| JP373553A |
Attorney, Agent or Firm:
Tsutomu Sugitani
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