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Title:
NUMERICAL INTEGRATING DEVICE
Document Type and Number:
Japanese Patent JPH05181645
Kind Code:
A
Abstract:

PURPOSE: To suppress a digit omission to the minimum and to improve the calculation accuracy by integrating the sum total from a partial section in which a calculation value is large, and from a partial section in which the absolution value is small, when a function to be integrated takes positive and negative values in an integral section, and in case a code is not varied, respectively.

CONSTITUTION: At every partial section obtained by dividing an integral section, a calculation containing a value of a function to be integrated in its partial section, and with regard to all the partial sections, addition is executed. Also, as for the function to be integrated for taking positive and negative values in the integral section, addition is executed from the partial section in which an absolute value of a calculation value is large, and as for the function to be integrated whose code is not varied, addition is executed from the partial section in which the absolute value of the calculation value is small. For instance, when this device is applied to a surface charge method for analyzing an electro-optical system of an electronic microscope, since the functions to be integrated are all positive, addition is executed in order of a small absolute value. That is, addition is executed in order from a section in which weight wi in a general integration formula I=Σiwi.f(ai) is small.


Inventors:
FUJIMOTO MINORU
MAEDA RIYUUGO
UCHIKAWA YOSHIKI
Application Number:
JP34667791A
Publication Date:
July 23, 1993
Filing Date:
December 27, 1991
Export Citation:
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Assignee:
SHIMADZU CORP
International Classes:
G06F7/544; (IPC1-7): G06F7/544
Attorney, Agent or Firm:
Yasuhiko Takeishi



 
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