PURPOSE: To form an offset erasing circuit advantageous for circuit integration, by using an integral network and a subtraction circuit not including a resistor.
CONSTITUTION: An integral network 15 and a subtraction circuit 11 are formed respectively without using a resistor. An output of and an input to a deciding device are inputted to a subtraction circuit 13 to pick up an error signal and it is integrated at an integral network 15 to estimate the offset. An estimate value of the offset is subtracted from an input signal having the offset at the subtraction citcuit 11. The output of the integral network 15 is set with this loop so that the average value of an error signal can be zero finally and a signal without offset can be obtained at the output of the deciding device 12. Thus, an offset erasing cirucit advantageous for the circuit integration can be formed.
ENOMOTO TADAYOSHI
YASUMOTO MASAAKI
| JPS614225A | 1986-01-10 |