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Title:
OHMIC ELECTRODE STRUCTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH0423361
Kind Code:
A
Abstract:

PURPOSE: To enable the ohmic contact to be made even if the impurity concentration on the rear surface side of an N+ type substrate is in the state not exceeding the solid solution limit of '5×1018atoms/cm3' by a method wherein the first metallic (Ti) layer, the second metallic (Sb) layer, the third metallic (Ti) layer and the fourth metallic (Ni) layer as a junction layer of solder material are successively formed on the rear surface part of an N+ type silicon substrate.

CONSTITUTION: A silicon (Si) substrate 11 is composed of an N+ substrate region 111 formed by Sb diffusion as well as an N- type substrate region 112 formed by epitaxial growth on the main surface of said region 111. On the rear surface side of the substrate 11, firstly, a Ti layer 12 as the first metallic layer and a bonding layer onto the silicon is formed. Next, an Sb layer 13 as the second metallic layer and an ohmic layer is formed on the Ti layer 12. Next, another Ti layer 14 as the third metallic layer working as the barrier metal of a solder material is formed on the Sb layer 13. Finally, an Ni layer 15 comprising the forth metallic layer as a contact layer of the solder material is formed on the Ti layer 14. In case of the formation of the silicon substrate 11, the Sb concentration can not exceed the limit of solid solution. Accordingly, the Sb concentration near the interface of silicon is augmented using titanium (Ti) to make sufficient ohmic contact.


Inventors:
KONDO ICHIJI
YAMAOKA MASAMI
INAGUMA YOSHIAKI
KAKITA OSAMU
YONEYAMA TAKAO
Application Number:
JP12319890A
Publication Date:
January 27, 1992
Filing Date:
May 15, 1990
Export Citation:
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Assignee:
NIPPON DENSO CO
International Classes:
H01L29/43; H01L21/28; (IPC1-7): H01L29/46
Attorney, Agent or Firm:
Takehiko Suzue (2 outside)