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Patent Searching and Data


Title:
ONE-CHIP MICROCOMPUTER
Document Type and Number:
Japanese Patent JPS638941
Kind Code:
A
Abstract:

PURPOSE: To improve efficiency of the use of a data memory and to confirm the content of the data memory in a short time by adding the content of all bits of the data memory and parity bits stored in a parity data memory, and executing parity check.

CONSTITUTION: Parity data basing on data stored in each row or column of a memory 1 are stored in parity data memories 4, 5. Accordingly, when low voltage is held to suppress power consumption, or temporary break of power source happened accidentally, change of the content of the data memory can be checked simply by executing parity check summing up bits of each row or column of the data memory 1 and parity bits stored in the parity data memory 4, 5. The check can be executed in a very short time, and at the same time, the program used can be minimized to one that sends an operation instruction to the parity check function.


Inventors:
HARADA YOSHIRO
Application Number:
JP15358686A
Publication Date:
January 14, 1988
Filing Date:
June 30, 1986
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F11/10; G06F15/78; (IPC1-7): G06F11/10; G06F15/06
Attorney, Agent or Firm:
Takashi Koshiba