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Patent Searching and Data


Title:
OPTICAL RECEPTION CIRCUIT
Document Type and Number:
Japanese Patent JP2005304022
Kind Code:
A
Abstract:

To hold an output of a photo diode to a predetermined value, and to prevent it from the saturation of a reception circuit caused by over output power and self destruction of the photo diode.

An optical reception circuit according to the present invention is composed of a bias power source and a feedback control circuit, and includes a photo diode, a high voltage source, and a voltage control circuit. The feedback control circuit is designed to compare a voltage signal with a predetermined value after detecting a signal current produced by the photo diode and converting it to the voltage signal. The value of a bias power source supplied to the photo diode is to be adjusted so that the signal current is to be maintained to the predetermined value after adjusting the voltage control circuit in response to the result of the comparison. As a result, an average signal value of the signal current from the photo diode is to be maintained to the predetermined value, thereby an amplifier to be connected to the photo diode is prevented from the saturation.


Inventors:
Nishiyama, Naoki
Application Number:
JP2005000107296
Publication Date:
October 27, 2005
Filing Date:
April 04, 2005
Export Citation:
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Assignee:
SUMITOMO ELECTRIC IND LTD
International Classes:
H03F3/08; H01J40/14; H03F1/30; H04B10/04; H04B10/06; H04B10/14; H04B10/158; H04B10/26; H04B10/43; (IPC1-7): H04B10/04; H03F3/08; H04B10/06; H04B10/14; H04B10/26; H04B10/28
Attorney, Agent or Firm:
佐野 健一郎
高野 明近
岩野 進