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Title:
OSCILLATION CIRCUIT WITH TEMPERATURE COMPENSATION
Document Type and Number:
Japanese Patent JPS60158717
Kind Code:
A
Abstract:

PURPOSE: To obtain an oscillation circuit which performs application to voltage/ frequency conversion and at the same time is subjected to temperature compensation, by increasing the level of working voltage of an inverter in response to the temperature rise.

CONSTITUTION: Gate voltages VGP and VGN are obtained at a node N3 between a resistance R4 and a P channel MOSFETQ5 connected in series between positive and negative power supply sides and a node N4 between a resistance R5 and N channel MOSFETQ5 respectively. The shift degrees of both FETs Q5 and Q6 are decreased in response to the temperature rise, and the current is reduced. The potential reduction due to resistances R4 and R5 is decreased. Then the voltages VGP and VGN are reduced and raised up respectively, and the gate- source voltage is increased for FETs Q1 and Q4. Thus the working voltage of an inverter consisting of FETs Q2 and Q3 can be increased. The size of each MOSFET and levels of resistances R4 and R5 are decided so as to change the gate voltage so that the increase of the transmission delay time due to the reduction of shifts of FETs Q2 and Q3 owing to the temperature rise can be compensated by the reduction of impedance between the source and the drain of FETs Q1 and Q4 respectively.


Inventors:
HIRASHIMA KUNIHIKO
Application Number:
JP1400584A
Publication Date:
August 20, 1985
Filing Date:
January 27, 1984
Export Citation:
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Assignee:
SEIKO INSTR & ELECTRONICS
International Classes:
H03K3/354; H03K3/011; H03K3/03; (IPC1-7): H03K3/354
Attorney, Agent or Firm:
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