PURPOSE: To hold the frequency accuracy of a TDMA system communication equipment also in the standby period of a PLL function by generating variable bias voltage which is equal to the fluctuation of control voltage at the time of the standby state of a phase comparator.

CONSTITUTION: When a PLLIC 1 is in a standby state (when a phase comparator is in a standby state), variable bias voltage fluctuating roughly equally to timewise fluctuation of control voltage (the charging voltage of the capacitor 18 of a loop filter 3) to be supplied to one electrode of the voltage variable reactance element 20 within VCO 4 is supplied to the other electrode of the element 20. When control voltage to one electrode of the element 20 fluctuates, the variable bias voltage to the other of the element 20 fluctuates in the same way. Therefore, the terminal voltage of the element 20 while the phase comparator is in the standby state does not fluctuate with the time lapse and the oscillation frequency of the VCO 4 is maintained constant.