OUTPUT BUFFER CIRCUIT - ADVANCED MICRO DEVICES INC

Title:

OUTPUT BUFFER CIRCUIT

Document Type and Number:

Japanese Patent JPH06216749

Kind Code:

A

Abstract:

PURPOSE: To provide a load driving output buffer circuit reduced in noise, low in power consumption and high in operating speed. CONSTITUTION: This output buffer circuit 10 uses multistage pull-up transistors 12, 16 and 20 and pull-down transistors 14, 18 and 22. While the pull-up (or pull-down) transistor on the 1st stage is activated, all the counter pull-up (or pull-down) transistors are practically inactivated at the same time. Afterwards, the remaining stage of pull-down (or pull-up) transistors are activated. By delaying turn-on in case of sharp turn-off, the noise transition level of overshoot and undershoot at the power source can be lowered.

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Inventors:

KUREIGU EMU PIITAASON

Application Number:

JP27973193A

Publication Date:

August 05, 1994

Filing Date:

November 09, 1993

Export Citation:

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Assignee:

ADVANCED MICRO DEVICES INC

International Classes:

G11C11/409; H03K17/16; H03K17/687; H03K19/003; H03K19/0175; H03K19/094; (IPC1-7): H03K19/0175; G11C11/409; H03K17/16; H03K17/687; H03K19/003

Attorney, Agent or Firm:

Fukami Hisaro (3 outside)

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