OUTPUT CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT INCORPORATING THE SAME THEREIN

Title:

OUTPUT CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT INCORPORATING THE SAME THEREIN

Document Type and Number:

Japanese Patent JP3852447

Kind Code:

B2

Abstract:

PROBLEM TO BE SOLVED: To attain high-speed operation with a simple circuit configuration in an output circuit which outputs a signal of a small amplitude.
SOLUTION: The output circuit for outputting an output signal having an amplitude smaller than a source voltage on the basis of a first drive signal is provided with: a first type MOS transistor QN10 in which the first driving signal is applied to its gate and which outputs a signal from its drain; a second type MOS transistor QP10 in which a second drive signal is applied to its gate and which outputs a signal from its drain; and feedback circuits 101 and 102 which generate the second drive signal by feeding an output signal resulting from combining the signal outputted by the MOS transistor QN10 and the signal outputted by the MOS transistor QP10 back to the gate of the MOS transistor QP10.

Inventors:

Shinichiro Kobayashi

Application Number:

JP2004011396A

Publication Date:

November 29, 2006

Filing Date:

January 20, 2004

Export Citation:

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Assignee:

Seiko Epson Corporation

International Classes:

H03K17/04; H03K19/0175; H03K17/687; H03K19/017; H03K19/0185; (IPC1-7): H03K19/0175; H03K17/04; H03K17/687; H03K19/017

Domestic Patent References:

JP6311014A
JP6314965A
JP2002344301A
JP2002217707A
JP2003087110A
JP2002353792A
JP2000031810A
JP8307236A
JP2001615A
JP2004140487A

Foreign References:

WO1991020130A1

Attorney, Agent or Firm:

Mutsumi Yanase
Masaaki Utsunomiya
Atsushi Watanabe

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