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Patent Searching and Data


Title:
OUTPUT CIRCUIT FOR SEMICONDUCTOR MEMORY
Document Type and Number:
Japanese Patent JPH05225787
Kind Code:
A
Abstract:

PURPOSE: To provide an output circuit for semiconductor memory which can suppress generation of undershoot and overshoot of an output signal.

CONSTITUTION: When an output signal DOUT is transited from a high level (VCC-VTN level) to a low level (GND level), a countermeasure circuit 11 for undershoot transits the output signal DOUT from the high level to the (GND +VTN) level (access judging point) with high speed, and a N channel MOS transistor 111 is cut off at the access judging point. The output signal DOUT is transited with low speed by a N channel MOS transistor 101 of low capability from the access judging point to the final transition level (GND level). Therefore, degradatjon of speed and generation of noise can be prevented.


Inventors:
HAMAGUCHI KUNIHIKO
Application Number:
JP2794392A
Publication Date:
September 03, 1993
Filing Date:
February 14, 1992
Export Citation:
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Assignee:
NIPPON ELECTRIC IC MICROCOMPUT
International Classes:
G11C11/417; G11C11/409; H03K19/0175; (IPC1-7): G11C11/417
Attorney, Agent or Firm:
Yosuke Goto (2 outside)