To provide an output circuit having a superior symmetry between the drive circuit of a push-side output transistor and that of a pull-side output transistor and satisfactory symmetry of transmission characteristics, when driving the output transistors.
The output circuit includes a transistor MP1, connected between a power supply rail V1 and an output terminal TOUT; a transistor MN1 connected between the output terminal TOUT and a power supply rail V2; a gm amplifier AP1 for amplifying the difference between a signal inputted to an input terminal and a reference voltage; current mirror circuits CMP1, CMP2 that include first and second control terminals, and first and second terminals to be controlled, and are vertically stacked between the power rail V1 and a first output end of the gm amplifier AP1; and current mirror circuits CMP1, CMP2 that include first and second control terminals and first and second terminals to be controlled and are vertically stacked between the power rail V2 and a second output end of the gm amplifier AP1.
| JP2007159117A | 2007-06-21 | |||
| JPH01141407A | 1989-06-02 | |||
| JP2002208854A | 2002-07-26 |
| US6121839A | 2000-09-19 |
Satoshi Kono
Makoto Nakamura
Yoshihiro Fukuhara
Takashi Mine
Toshio Shirane
Sadao Muramatsu
Nobuhisa Nogawa
Kocho Chojiro
Naoki Kono
Katsu Sunagawa
Katsumura Hiro
Tatsushi Sato
Takashi Okada
Mihoko Horiuchi
Takenori Masanori
Takuzo Ichihara
Yamashita Gen
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