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Patent Searching and Data


Title:
OUTPUT CIRCUIT
Document Type and Number:
Japanese Patent JPH02232577
Kind Code:
A
Abstract:

PURPOSE: To enable fast operation with a reduction in the number of elements by building a circuit having a diver control circuit, two compound gates and an output means.

CONSTITUTION: This circuit is made up of a driver control circuit 10 comprising two input NANDs, two compound gates 21 and 22, an inverter 23, and an output drive circuit 20 comprising PMOS and NMOS transistors Tr 24 and 25. Then, at a normal mode, the circuit 10 outputs a tristate control signal DOE by inversion and two gates 21 and 22 also output output signals by inversion separately. According to the signals, any one state of a high level HL, a low level LL and a high impedance HI is outputted. At a test mode, the circuit 10 outputs a HL state, the gate 21 a LH state and the gate 22 a HL state separately. An output means outputs any one of the HL, LL and HI according to the states of test control signals Q, R and S. A circuit thus arranged allows a very small number of elements-- 18 of transistors -- and an output signal Din only passes through a double stage gate thereby enabling fast operation.


Inventors:
TANOI SATOSHI
Application Number:
JP5196389A
Publication Date:
September 14, 1990
Filing Date:
March 06, 1989
Export Citation:
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Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
G01R31/317; H03K19/00; H03K19/0175; G01R31/26; (IPC1-7): G01R31/26; G01R31/318; H03K19/00; H03K19/0175
Attorney, Agent or Firm:
Toshiaki Suzuki