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Patent Searching and Data


Title:
OUTPUT CONTROLLING SYSTEM OF TIME DIVISION SWITCH
Document Type and Number:
Japanese Patent JPS59156097
Kind Code:
A
Abstract:

PURPOSE: To eliminate duplicate output of information to the same channel by taking AND of empty block control bit of a control memory and output of a speech pass memory and outputting "L" level to corresponding output channel when the empty block control bit indicates empty.

CONSTITUTION: Word constitution of a control memory 204 has 10 bit speech pass memory address consisting of b0∼b9 and empty block control bit consisting of one bit b10. Which input channel is outputted to corresponding output channel is decided according to the contents of the control memory 204. When empty block control bit of the control memory 204 is "0", if corresponding output channel is empty, output of AND gates 220∼227 becomes "L" irrespective of output of the speech pass memory 202, and all bits of corresponding channel are made "0". Output of AND gates 220∼227 is loaded to shift registers 230∼237.


Inventors:
AMADA EIICHI
SHIRASU HIROTOSHI
KUWABARA HIROSHI
SUZUKI TAHEI
MORITA TAKASHI
Application Number:
JP2935383A
Publication Date:
September 05, 1984
Filing Date:
February 25, 1983
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H04Q3/52; H04Q11/04; (IPC1-7): H04Q3/52
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)