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Title:
OUTPUT SIGNAL STATE CHANGING CIRCUIT
Document Type and Number:
Japanese Patent JP2018160754
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To change an output signal brought into a first state accurately into a second state at desired timing.SOLUTION: An output signal state changing circuit includes a first clock generating section 18 for outputting a clock signal with a second period TC shorter than a switching period TSW, and capable of changing output timing of the clock signal. Based on a pulse width command value k for instructing a desired pulse width, the first clock generating section 18 is controlled to change the output timing of the clock signal so that a count value of the clock signal becomes a value based on the time of the desired pulse width, when the time of the desired pulse width elapses after a start of the switching period TSW. When the count value of the clock signal becomes the value based on the time of the desired pulse width, the generation pulse in a rising state is changed to a falling state. With such an arrangement, the generation pulse can be brought into the falling state accurately, at the time of the desired pulse width.SELECTED DRAWING: Figure 1

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Inventors:
NISHIMURA YASUHIRO
OISHI KOSHI
KOSAKA TAKUYA
Application Number:
JP2017056078A
Publication Date:
October 11, 2018
Filing Date:
March 22, 2017
Export Citation:
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Assignee:
TOYOTA CENTRAL RES & DEV
TOYOTA IND CORP
International Classes:
H03K5/05; H03K7/02
Domestic Patent References:
JP2000269816A2000-09-29
JP2009290473A2009-12-10
Foreign References:
US20060164142A12006-07-27
Attorney, Agent or Firm:
Atsushi Nakajima
Kato Kazunori