Title:
OVER-CURRENT PREVENTIVE CIRCUIT
Document Type and Number:
Japanese Patent JP2004070472
Kind Code:
A
Abstract:
To suppress an over-current flowing in an externally fit capacity in an output part of a regulator for a communication equipment, when power is applied to.
A current flowing in a third MOS transistor 13 having a size of one-Nth (N : integer) of a first MOS transistor 11 flows in a third resistance 33. A voltage thereof is compared with a reference voltage source voltage VREF, and a second MOS transistor 12 is turned on and off based on a result of the comparison to control a gate of the first MOS transistor 11. A level of the over-current is regulated not to make a current having N times or more of current of the current flowing in the third MOS transistor 13 flow in the first MOS transistor 11, by this constitution.
Inventors:
SAKAGAMI OAKI
Application Number:
JP2002225807A
Publication Date:
March 04, 2004
Filing Date:
August 02, 2002
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G05F1/56; (IPC1-7): G05F1/56
Attorney, Agent or Firm:
Fumio Iwahashi
Tomoyasu Sakaguchi
Hiroki Naito
Tomoyasu Sakaguchi
Hiroki Naito