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Title:
OVERCURRENT PREVENTING CIRCUIT FOR CONTACTLESS SWITCH
Document Type and Number:
Japanese Patent JPS63187814
Kind Code:
A
Abstract:

PURPOSE: To prevent the time till an output transistor (TR) is turned off after the detection of overcurrent by providing a buffer circuit between a timer capacitor and a voltage detection circuit, providing a level shift TR between the two circuits and connecting a constant current circuit to an input terminal of the voltage detection circuit.

CONSTITUTION: A TR 50 constitutes a level shift circuit and it is provided between a buffer circuit and a Schmitt trigger circuit. Moreover, a base of a TR 51 is connected to a base of a TR 52, the base and emitter are connected and the TRs 51, 52 constitute a current mirror circuit. When the potential of the timer capacitor 18 changes from a high voltage to zero V, a TR 48 is turned on and no current flows to the TR 50. Then, the electric charge in the base- emitter capacitance is absorbed through the TR 51 and the response till the TR 43 is turned off is quickened. When the level of the timer capacitor 18 changes from zero V to a high voltage, the TR 48 is turned off and a current flows through the TR 50. Then, nearly a half current is absorbed through the TR 51, while the TR 43 is operated sufficiently stably in the remaining current.


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Inventors:
Suzuki, Shinichiro
Application Number:
JP1987000018674
Publication Date:
August 03, 1988
Filing Date:
January 30, 1987
Export Citation:
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Assignee:
YAMATAKE HONEYWELL CO LTD
International Classes:
H03K17/08; F04B25/04; H03K17/22; H03K17/945; (IPC1-7): H03K17/08



 
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