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Title:
【発明の名称】ハイブリッド集積回路の製造方法
Document Type and Number:
Japanese Patent JPH11505671
Kind Code:
A
Abstract:
A method of manufacturing a semiconductor device with a substrate (1) provided with a passive element (2), a pattern of conductors (3, 4), and a semiconductor element (5) which is formed in a small slice (6) of semiconductor material. The passive element (2), the pattern of conductors (3, 4), and the semiconductor element (5) are formed at a first side (8) of a wafer of semiconductor material (7), whereupon this wafer is glued with its first side (8) to the substrate (1), and the semiconductor material of the wafer (7) is removed from the second side (22) thereof, except at the area of the semiconductor element (5). A small slice (6) of semiconductor material thus remains in which the semiconductor element (5) has been formed. The wiring may be realized in a simple manner without the introduction of additional and expensive process steps, while the introduction of parasitic capacitances and self-inductances is counteracted.

Inventors:
Deckle ronald
Mars Henrix Hode Fridas Rafael
Van den Einden Wilhelms Theodorus Antonius Johannes
Van der zen maria henrica virhelmina antonia
Application Number:
JP53238697A
Publication Date:
May 21, 1999
Filing Date:
February 07, 1997
Export Citation:
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Assignee:
Philips Electronics Nemrose Fennaught Shap
International Classes:
H01L21/762; H01L21/02; H01L21/20; H01L21/58; H01L21/84; H01L25/16; H01L27/12; H01L27/13; H01P11/00; (IPC1-7): H01L27/12; H01L21/762; H01P11/00
Domestic Patent References:
JPH065881A1994-01-14
JPS62105448A1987-05-15
JPS6399996A1988-05-02
JPS63308386A1988-12-15
JPH0829807A1996-02-02
JPS60167364A1985-08-30
JPH06268223A1994-09-22
JPH07209671A1995-08-11
JPH05257171A1993-10-08
Foreign References:
WO1996020497A11996-07-04
Attorney, Agent or Firm:
Akihide Sugimura (6 others)