Title:
インテグレーテッドPLLを備えたPWMコントローラ
Document Type and Number:
Japanese Patent JP2006502656
Kind Code:
A
Abstract:
A pulse-width modulation (PWM) controller to supply power to electronic components using a phase lock loop (PLL) is presented. A PWM controller comprises an input node operable to receive a reference signal and a phase-locked loop (PLL). The PLL comprises an oscillator operable to receive an error-correction signal and to generate an oscillator signal having a frequency that is related to the error-correction signal, a phase-frequency detector (PFD) coupled to the oscillator and operable to receive the reference signal and to generate the error-correction signal based upon a phase difference between the reference signal and a feedback signal, and a suppression circuit coupled to the PFD and operable to periodically enable the PFD to generate the error-correction signal.
Inventors:
Wreath, james, william
Dick man, mark
Dick man, mark
Application Number:
JP2004543104A
Publication Date:
January 19, 2006
Filing Date:
October 01, 2003
Export Citation:
Assignee:
Intersil Americas, Inc.
International Classes:
H03L7/089; H03K7/08; H03L7/07; H03L7/107; H03L7/183
Attorney, Agent or Firm:
Tadao Hirata