Title:
遊技機
Document Type and Number:
Japanese Patent JP6719846
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a game machine, when a communication error occurs between a control circuit and a sub control circuit, capable of checking an occurrence of the error, a time and date, and a content.SOLUTION: A sub control circuit includes a sub CPU to implement: error information registration means that, when a communication disconnection counter becomes a prescribed value or more, determines an occurrence of a communication disconnected state with a main control circuit and registers the information in an error information history storage area of DRAM; and error information history display means that displays the information registered in the error information history storage area on a display device. When the communication disconnected state occurs, information items to be registered in the error information history storage area are time/date data counted by a built-in RTC, and a prescribed code representing the communication disconnection information. Information items that the error information history display means displays on the display device are the time/date that is registered in the error information history storage area and when the communication disconnection state occurs; and the prescribed code representing the communication disconnected state.SELECTED DRAWING: Figure 49
Inventors:
Kazuyuki Yanagi
Masaomi Watanabe
Atsushi Nishida
Masaomi Watanabe
Atsushi Nishida
Application Number:
JP2018148132A
Publication Date:
July 08, 2020
Filing Date:
August 07, 2018
Export Citation:
Assignee:
Universal Entertainment Inc.
International Classes:
A63F5/04
Domestic Patent References:
| JP2007135714A | ||||
| JP2002191753A | ||||
| JP2008029400A | ||||
| JP2013066612A | ||||
| JP2013085784A | ||||
| JP2001327743A |
Attorney, Agent or Firm:
Gunichiro Ariga