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Patent Searching and Data


Title:
PACKAGE FOR HIGH DENSITY MEMORY
Document Type and Number:
Japanese Patent JPS5984455
Kind Code:
A
Abstract:

PURPOSE: To enable to obtain a large capacity memory circuit of a high performance with a package at a low cost by a method wherein a plurality of semiconductor memory IC's and one or more semiconductor level IC's are mounted on the same ceramic substrate.

CONSTITUTION: On the component mounting surface 11 of the ceramic substrate 1, eight semiconductor memory IC's 21 are mounted respectively on chip carriers 2, and further two semiconductor level conversion IC's 31 contained in a tape carrier 3 are bonded. The IC31 is composed by including the first level conversion circuit which converts e.g. a low current switching type logical (CML) level into an emitter coupled logical (ECL) level and the second level conversion circuit which converts the ECL level into the CML level. A signal of the CML level inputted from input terminals 12 of the substrate 1 is converted by the first level conversion circuit into the ECL level and then inputted to the IC21. A signal of the ECL level the IC21 outputs is converted by the second level conversion circuit into the CML level and then outputted to the outside from output terminals 12.


Inventors:
NISHIMORI HIDEKI
Application Number:
JP19339082A
Publication Date:
May 16, 1984
Filing Date:
November 05, 1982
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G11C5/00; G11C11/417; H01L25/04; H01L25/18; (IPC1-7): G11C5/00; H01L25/02
Attorney, Agent or Firm:
Sumita Toshimune