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Title:
PACKAGE FOR SEMICONDUCTOR
Document Type and Number:
Japanese Patent JPS61187256
Kind Code:
A
Abstract:

PURPOSE: To obtain a package, the mileage of a cap thereof is taken in a large value, the side wall of a bonded surface thereof is difficult to be broken and the cap thereof is easily positioned and fixed positively, by forming structure in which the height of the side wall is heightened only in sections in the vicinity of both ends in the longitudinal direction of the package.

CONSTITUTION: Inner lead groups (a base section 2 and inner leads 3) and external leads 4 are exposed in a lead frame consisting of a metal such as a 42 alloy, and the lead frame is pre-molded with a resin such as polyphenylene sulfide 1. The element base section 2 and the inner leads 3 are exposed on the base of a recessed section in a resin section, a cap bonded surface 5 is shaped at the intermediate step of the recessed section, and a side wall 6 is formed on the outside. With the side wall 6, both ends in the longitudinal direction are heightened integrally as the surfaces of the resin 1, and other sections are lowered. When the side wall is 0.3mm thick, it is proper that height thereof is brought to 0.5W0.8mm and other sections (intermediate sections) to approximately 0.3mm.


Inventors:
OKAMOTO TOMIO
Application Number:
JP2696285A
Publication Date:
August 20, 1986
Filing Date:
February 14, 1985
Export Citation:
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Assignee:
MATSUSHITA ELECTRONICS CORP
International Classes:
H01L23/08; H01L23/057; (IPC1-7): H01L23/04
Attorney, Agent or Firm:
Akira Kobiji (2 outside)



 
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