Title:
半導体素子用パッケージおよび半導体装置
Document Type and Number:
Japanese Patent JP7036646
Kind Code:
B2
Abstract:
To provide a package for a semiconductor element that includes a transmission line advantageous for improving high frequency properties.SOLUTION: A package 10 for a semiconductor element comprises: a substrate 1 that has a storage unit 1aa of a semiconductor element 11 surrounded by a wall portion 1a; an insulating plate 2 that is located adjacent to a side face of the wall portion 1aa of the substrate 1; pin terminals 3 that are located projecting from the wall portion 1a toward the surface of the insulating plate 2; signal wires 4 that are located on the surface of the insulating plate 2 and have ends connected to the pin terminals 3; and first ground wires 5 and second ground wires 6 that are located on the surface of the insulating plate 2 while sandwiching the signal wires 4 and spaced from the signal wires 4. Only the first ground wires 5 extend to positions adjacent to the pin terminals 3.SELECTED DRAWING: Figure 3
Inventors:
Takayuki Shirasaki
Application Number:
JP2018060423A
Publication Date:
March 15, 2022
Filing Date:
March 27, 2018
Export Citation:
Assignee:
Kyocera Corporation
International Classes:
H05K1/11; G02F1/01; H01L23/12; H05K1/02; H05K1/18
Domestic Patent References:
| JP2012028521A | ||||
| JP2004064459A | ||||
| JP2011015200A | ||||
| JP2010191346A | ||||
| JP2012244002A | ||||
| JP2015226311A |
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