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Title:
PACKAGING METHOD OF ELECTRONIC COMPONENT
Document Type and Number:
Japanese Patent JP2006303357
Kind Code:
A
Abstract:

To provide a packaging method of an electronic component in which deterioration in packaging efficiency due to bonding all electronic components by a transparent laser bonding system is avoided while suppressing gap in bonding position due to difference in thermal expansion coefficient between the electronic component and a mother board 1, and bonding failure of an electrode pad 3 and a bonding electrode can be suppressed.

In the packaging method of an electronic component, such a mother board 1 as a first bonding layer is formed on the surface of a part of a plurality of electrode pads 3 and a second bonding layer 7 composed of a conductive material having a melting point higher than that of the first bonding layer is formed on the surface of other electrode pad 3 is employed, and the mother board 1 mounting the electronic component on the first bonding layer is placed in a reflow furnace which is kept at a temperature lower than the melting point of the second bonding layer 7. Following to a reflow bonding step for bonding a part of electrode pads 3 and the electronic component by melting only the first bonding layer, a new electronic component 200 is mounted on the second bonding layer 7 which is then irradiated with a laser beam and melted.


Inventors:
KOBAYASHI TAKESHI
MORIYAMA EIJI
YAMADA HIDEKI
Application Number:
JP2005126232A
Publication Date:
November 02, 2006
Filing Date:
April 25, 2005
Export Citation:
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Assignee:
RICOH MICROELECTRONICS CO LTD
International Classes:
H05K3/34; B23K1/00; B23K1/005; B23K3/00; B23K101/42
Domestic Patent References:
JPS61263297A1986-11-21
JP2003060339A2003-02-28
JPS56165333A1981-12-18
JPS63164296A1988-07-07
JPH11320133A1999-11-24
Attorney, Agent or Firm:
Toshi Kuroda