PARALLEL OUTPUT TYPE ELECTRONIC INTERLOCKING SYSTEM FURNISHED WITH FAIL SAFE MAJORITY LOGIC CIRCUIT

Japanese Patent JP3802895

B2

PROBLEM TO BE SOLVED: To provide a fail safe majority logic circuit not to output false output on the dangerous side even at the time when a single failure occurs by discovering the single failure at an early stage.
SOLUTION: The fail safe majority logic circuit to find a majority of at least three pieces of logic input is constituted by a circuit to compose the two input each of the three input of three pieces of OR circuits 311∼313 and to compose output of these OR circuits by a three input AND circuit 321. Additionally, a control mode and a failure detection mode are set in the circuit, a pattern for failure detection is input at the time of the failure detection mode and a failure of a part constituting the circuit is detected by absorbing the output. The input is forcibly changed so that the output of the circuit does not output to the dangerous side in the case of detecting the failure. Safety of the electronic interlocking device is improved by applying this fail safe majority logic circuit to the electronic interlocking device.

Atsushi Kawabata
Tashiro ISHI
Michio Fujiwara
Hitoshi Yanagi
Shigeru Kuwana
Kikuchi Tsunenobu
Satoshi Fukui
Hiroshi Saito

JP2003343270A

July 26, 2006

October 01, 2003

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株式会社日立製作所
東日本旅客鉄道株式会社

B61L19/06; H03K19/007; G05B9/02; (IPC1-7): B61L19/06; G05B9/02

JP54002532B1
JP64039119A
JP61064749U
JP62136921A
JP64088169A

Kenjiro Take

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