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Title:
PARALLEL PROCESSOR
Document Type and Number:
Japanese Patent JPH02151934
Kind Code:
A
Abstract:

PURPOSE: To select a partial user by providing the processor with a memory for inputting an address signal from a use request input part as an address and a use permission output part for inputting data from the memory and outputting a use permission signal for each use request signal.

CONSTITUTION: Inputted (n) use request signals are directly used as (n) address signals and n-bits data outputted from the memory 102 is directly outputted as (n) use permission signals. A use request input part 101 periodically reads in a use request signal 104 and outputs an address signal to the memory 102. The memory 102 outputs data stored in the inputted address, and after stabilizing the output, a use permission output part 103 reads in the data and outputs use permission signals 105 for a common resource to respective users. The state of the signal 105 to the state of the signal 104 is determined based upon the contents of the memory 102. Consequently, priority for the specific combination of users can be optionally specified.


Inventors:
MIZUNO HIROSHI
Application Number:
JP30646588A
Publication Date:
June 11, 1990
Filing Date:
December 02, 1988
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F13/12; G06F9/46; G06F9/52; G06F13/14; G06F15/16; G06F15/177; (IPC1-7): G06F9/46; G06F13/12; G06F13/14; G06F15/16
Attorney, Agent or Firm:
Shigetaka Awano (1 person outside)