PARALLEL PROCESSOR

Title:

PARALLEL PROCESSOR

Document Type and Number:

Japanese Patent JPH0683786

Kind Code:

A

Abstract:

PURPOSE: To execute operation for transferring data to near-by memories in a short time.

CONSTITUTION: A parallel processor consisting of an input shift register 1, input side memories 21 to 2M, selectors SELa1 to SELaM, arithmetic circuits 31 to 3M, selectors SELb1 to SELbM, output side memories 41 to 4M, and an output shift register 5 is also provided with input side and output side transferring shift registers 8, 9. The registers 8, 9 are respectively provided in the input side memories 21 to 2M and the output side memories 41 to 4M. Data read out from the memories 21 to 2M are fetched by the register 8 and shifted in the horizontal direction in the Figure and then the shifted data are written in the memories 21 to 2M again. Namely the data are written at positions in the input side memories 21 to 2M distant from their read out positions by a shifted amt. The register 9 is similarly operated.

Inventors:

OKI MITSUHARU

Application Number:

JP23054192A

Publication Date:

March 25, 1994

Filing Date:

August 28, 1992

Export Citation:

Click for automatic bibliography generation Help

Assignee:

SONY CORP

International Classes:

G06F15/80; G06F15/16; G06T1/20; H03M9/00; H04N5/14; (IPC1-7): G06F15/16; G06F15/66; G06F15/80; H03M9/00; H04N5/14

Attorney, Agent or Firm:

Hidekuma Matsukuma

Next Patent: 水蒸気改質用の触媒