PURPOSE: To facilitate the programming by outputting a load pulse from a comparator when a time set in a 1st register and a value of a timer are coincident to apply parallel serial conversion to a parallel data written in a 2nd register.

CONSTITUTION: The time (timing value) is set in the 1st register 1. A clock signal (a) is counted in the timing 2. The timing value of the register 1 and the value of the timer 2 are compared by the comparator 3 and when they are coincident, a load pulse (c) is outputted and inputted to a parallel/serial converter 5. The converter 5 converts a parallel data written in a register 4 into a serial data (b) to given an output. Thus, the time width to generate the load pulse is widened and the formation of the program to operate the parallel serial conversion circuit 5 is facilitated.