PURPOSE: To execute an operation of a binary code at a high speed by recording the binary code of a binary digit string in a register, and executing a logical operation by a partial sequence conversion register of a code subjected to partial sequence conversion by exclusive OR.

CONSTITUTION: The register executes the partial sequence conversion for setting a digit 3 designated by a register 2 in which example '1' of a binary digit string is recorded, and each code to a digit 5 of a first code '0' in the direction of the higher rank digit from its digit 3, to a code of exclusive OR to a code 4. A register 6 of its result is the partial sequence conversion register of the code related to the designated digit 3. Subsequently, this register executes the partial sequence conversion for setting a digit 9 designated by a register 8 in which an example 7 of the binary digit string is recorded, and each code to a digit 10 of a first code '1' in the direction toward the higher rank digit from its digit 9, to a code of exclusive OR exclusive OR to the code 4. A register 11 of its result is the partial sequence conversion register of the code '0' related to the designated digit 9. In such a way, by a circuit configuration for executing mainly a logical operation of exclusive OR in an electronic computer, an operation of a binary code can be executed at a high speed.