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Title:
PARTIAL WRITE CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPH0216657
Kind Code:
A
Abstract:

PURPOSE: To reduce the number of access times when writing operations are made several times continuously and to shorten whole processing time by omitting the reading and writing operations at every partial write when specific conditions are satisfied.

CONSTITUTION: A partial write control section 1, read data holding buffer 2, and write data holding buffer 3 are provided in a memory controller and 1st and 2nd buffers B1 and B2 for respectively inputting 1st and 2nd write data and their addresses are incorporated in the buffer 3. In addition, a write data checking section 6, address checking section 5, and partial condition discriminating section 7 are provided in the control section 1 and the 1st data and address are tentatively held in the 1st buffer B1. The 2nd data are also tentatively held in the 2nd buffer B2 and the deciding section 7 decides whether or not the 1st and 2nd data are continuous to each other. When the 1st and 2nd data are continuous, an Ecc preparing section 4 puts the data together for writing operations.


Inventors:
KOJIMA KAZUNORI
Application Number:
JP16729988A
Publication Date:
January 19, 1990
Filing Date:
July 05, 1988
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F12/16; (IPC1-7): G06F12/16
Attorney, Agent or Firm:
Akira Yamatani



 
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