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Title:
PATTERN INSPECTION METHOD
Document Type and Number:
Japanese Patent JP2007221167
Kind Code:
A
Abstract:

To provide an inspection apparatus for acquiring circuit pattern images or the like of a semiconductor wafer, wherein the apparatus is, in particular, capable of inspecting whole to a part of the specimen at high speed and with high sensitivity.

The apparatus comprises a stage 1, an irradiating means 2 for irradiating the specimen with an electron beam, an electron detection means 3 that generates an image information of the specimen from secondary electrons or the like generated from the specimen by the irradiation with the electron beam, a stage driving means 4 for driving the stage 1, and a deflection means 5 for deflecting the secondary beam, wherein the electron detection means 3 comprises a fluorescence part 6, a TDI (time delay integration) array CCD sensor 7, and a control unit 8 that shifts the charges stored in the TDI array CCD sensor 7, and possesses a stage scan mode for shifting the charges stored in the TDI array CCD sensor 7 in response to the movement of the stage and a deflector scan mode for shifting the charges stored in the TDI array CCD sensor 7 in response to the projected position of the secondary beam projected onto the electron detection means 3 by the deflection means 5.

COPYRIGHT: (C)2007,JPO&INPIT


Inventors:
WATANABE YOICHI
KOHAMA SADAAKI
Application Number:
JP2007124652A
Publication Date:
August 30, 2007
Filing Date:
May 09, 2007
Export Citation:
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Assignee:
NIKON CORP
International Classes:
H01L21/66; H01J37/28
Domestic Patent References:
JPH07249393A1995-09-26
JPH04348260A1992-12-03
Attorney, Agent or Firm:
Furuya Fumio
Toshihide Mori