PURPOSE: To reduce the capacity of a pattern memory by storing the time width between adjacent change points and performing the reading operation from the pattern memory according to this time width.

CONSTITUTION: A coincidence detection circuit 2 receiving two data and outputting a detection pulse when coincidence is detected, and an address counter 3 turning an address value to the initial value by receiving a reset signal and a clock at the time of starting, then receiving the detection pulse, and outputting the address value while increasing the address value one at a time, are provided. A pattern memory 4 receiving the address value outputted by the address counter 3 and outputting the data stored in the corresponding address to the coincidence detection circuit 2 is provided. Further, a counter 5 returning a calculation value to zero when a reset signal and the detection pulse are received and then outputting the calculation value while increasing the calculation value one at a time as data to the coincidence detection circuit 2, and a toggle circuit 6 inversing an output state every time the detection pulse is received, are provided. Thus, the utilization capacity of pattern memory is reduced.