PURPOSE: To improve the transmission characteristic of the entire transmission system by providing a zero code detection circuit and a polarity bit fixed circuit additionally so as to reduce the production of noise due to offset without the deterioration in the various characteristic of the CCITT recommendations.

CONSTITUTION: When an 8-bit code is a positive zero code 11111111, or a negative zero code 01111111, since the input of a NAND 13 is all '1', its output goes to '0'. Thus, the output of a NAND 15 goes to '1' without fail independently of any output of an inverter 14, and the polarity bit input to a PCM decoder 9 is always at level '1'. When the 8-bit code is other than the positive/ negative zero code, one or over of bits in a 2∼8 bit data to to '0' without fail, the output of the NAND 13 goes to '1'. Thus, the NAND 15 outputs an inverted signal in response to an output from the inverter 14, that is, the polarity bit signal inputted to the input terminal 1 to a decoder 9 as it is. That is, in case of the negative zero code with respective to the positive/negative zero code input, the code is converted into the positive zero code and decoded.